1. Field of the Invention
The present invention relates to a semiconductor memory device having a burn-in circuit. More particularly, the present invention relates to a semiconductor memory device having a burn-in circuit for supplying a burn-in voltage to at least one of circuit elements that has been incorporated in the memory device together with the other circuit elements, but is selectively extincted according to the particular circuit design of the semiconductor device.
2. Description of the Related Art
A conventional reference voltage generating circuit (Vref circuit) comprises a plurality of resistance adjusting fuses for controlling resistance of the circuit. The resistance is controlled by cutting one or some of these fuses, so that a reference voltage generating circuit capable of applying a certain voltage can be obtained.
FIG. 3A shows an enlarged plan view of a fuse, in which wires 1 forming a circuit together with the fuse 2 are connected with opposite ends of the fuse 2. When as shown in FIG. 3B, a laser beam 3 is applied to the fuse 2, the fuse 2 melts to break with the circuit line consequently opened. In the field of manufacture of semiconductor devices, such a fuse is employed in a plural number in each of those semiconductor devices being manufactured so that at the time the semiconductor device is incorporated in a circuit that requires for the semiconductor device to exhibit a particular line resistance, one or some of the fuses in the semiconductor device may be extincted by radiation of a laser beam to allow the semiconductor device to exhibit such particular line resistance.
In a highly integrated semiconductor memory device, width of the fuse 2 used therein is so small that the laser beam 3 will not impinge exactly upon an intended site of the fuse 2 and may often impinge at a wrong site of the fuse 2 as shown in FIG. 4A, 4B or 4C. Specifically FIG. 4A illustrates the case in which the fuse 2 is not cut because of the laser beam impinging out of the fuser 2. FIG. 4B illustrates the case in which the fuse 3 is partially cut as a result of the laser beam impinging upon the fuse 2 at a location offset from the intended site. FIG. 4C illustrates the case in which the wire 1 is cut as a result of the laser beam impinging upon such wire 1.
If the line resistance exhibited by the reference voltage generating circuit employed in the semiconductor memory device is found falling within a permissible tolerance after one or some of the fuses 2 have been cut, the reference voltage generating circuit may be considered acceptable and free from a defect. That is, even if the reference voltage generating circuit comprises the insufficiently cut fuses 2 such as shown in FIGS. 4B and 4C, the resultant reference voltage generating circuit is generally treated as an acceptable product free from a defect, provided that the total resistance of the circuit is within the design tolerance.
However, where a partially cut fuse 2 such as shown in FIG. 4B remains employed in the reference voltage generating circuit, the cutting may progress and the fuse 2 may eventually break down during the use thereof on the active generating circuit. Once this occurs, the total resistance of all of those fuses used in the reference voltage generating circuit increases with passage of time of use thereof and finally the generating circuit will come to fail to supply a requisite reference voltage.
Also, in the conventional semiconductor memory device, it has been a problem that resistance of wire, for example, a bit line, shifts with passage of time of use thereof.